1. Field of the Invention
The present invention relates to an integrated circuit (IC) with an oscillator, and in particular, to such a circuit which also includes electrostatic discharge (ESD) protection.
2. Description of the Related Art
Referring to FIG. 1, high frequency oscillators play a critical role in many circuits, particularly wireless communication circuits. With the increased use and complexities of wireless communication devices, such circuits have become increasingly sophisticated. Among others, one characteristic which is often critical is low phase noise performance. This requires the oscillator to have a resonant, or “tank”, circuit with a high quality factor Q.
Referring to FIG. 1, one conventional implementation of an oscillator 10 within an IC includes an amplifier circuit with cross-coupled complementary metal oxide semiconductor field effect transistors (C-MOSFETs), such as P-type transistors P1 and P2 and N-type transistors N1 and N2, interconnected substantially as shown, and biased between upper (e.g., positive) VDD and lower (e.g., negative) VSS/GND power supply voltage terminals via a resistor R1. The output voltage Vout is a differential voltage which appears between signal electrodes 12a and 12b. The tank circuit is formed using shunt capacitors C1 and C2 and inductors L1 and L2 connected to signal electrodes 12a and 12b as shown. As is well known in the art, the capacitors C1, C2 can be variable, e.g., varactors, so that this oscillator circuit 10 can be operated as a voltage control oscillator (VCO). The inductors are connected together via a shared electrode B3 (discussed in more detail below).
As is well known in the art, modern ICs virtually always include on-chip ESD protection, and this circuit 10 is no different. To prevent an external ESD event from damaging the oscillator circuitry, ESD protection circuitry in the form of shunt diodes D1a, D1b, D2a and D2b are connected between the output signal electrodes 12a, 12b (which can also be electrically connected to on-chip bonding pads B1, B2) and the power supply rails VDD, VSS/GND as shown. (The operating principles of such ESD protection circuitry are well known in the art. Further, it will be appreciated by one of ordinary skill in the art that other forms of ESD protection circuitry can be used as well, with such other forms of ESD circuitry also being connected in a shunt arrangement at the output signal electrodes 12a, 12b.)
Referring to FIG. 2 in conjunction with FIG. 1, the inductors L1, L2 are typically implemented using bond wires 14a, 14b, with the shared electrode B3 being a bonding pad resident on a package leadframe 22 upon which the die 20 containing the IC is placed. At the high frequencies for which such integrated oscillator circuits are used, such bond wires 14a, 14b provide the inductance necessary for the tank circuit. As is well known in the art, the die 20 will include a number of other bonding pads 24, which are electrically connected to package leadframe bonding pads 26 via bond wires 28.
A problem with this conventional approach, however, is the loading presented to the signal electrodes 12a, 12b by the shunt ESD circuitry. Such loading is generally in the form of the shunt capacitance which is inherent to the ESD protection circuitry. This shunt capacitance generally has a low quality factor Q, and thereby causes the overall quality factor Q of the tank circuit to be significantly degraded, resulting, in turn, in increased phase noise in the output signal Vout of the oscillator circuit. Further, such additional capacitance of the ESD circuitry adds to the fixed capacitance of the tank circuit, thereby limiting the maximum oscillation frequency and decreasing the effective tuning range, e.g., when using varactors for the tank circuit capacitors C1, C2.